Non-volatile memory devices such as, for example FLASH memory devices, may include an array of memory cells divided into a number of sectors. Each memory cell may have a gate, a source and a drain, where the gate controls current flow between the source and the drain. The amount of current flow generally depends on a voltage applied to the gate (gate voltage). If the gate voltage Vg is below a threshold voltage Vt which is intrinsic to the physical properties of the memory cell, there is no current flow (generally a leakage current exists) between the drain and the source. When the gate voltage exceeds the threshold voltage, current flows between the drain and the source, the amount of current depending on the magnitude of the applied gate voltage. The gate voltage Vg is generally adjusted to different values depending on whether the cell is to be programmed (write), erased or verified. When programming a cell, the gate voltage Vg is usually greater than when reading or erasing the cell.
A typical erasure operation for non-volatile memory devices may include the erase flow shown in FIG. 1. Erase flow 100 may include the steps of pre-program 102, erase 104, soft-program 106, non-data cell program 108, and erase completed 110. One or more of the steps may include an iterative process wherein one or more internal operations associated with the execution of a particular step is subject to a verification procedure. Based on the result of the verification procedure, the one or more operations may be repeated one or more times, and each time may be followed by the verification procedure. This iterative process may be repeated until the one or more operations are verified as being properly executed (by means of the verification procedure). Upon completion of the iterative process, the step may be considered completed and erase flow 100 may continue to the next step.
In pre-program step 102, a pre-program voltage may be applied to some or all the data cells in a sector so that all pre-programmed cells hold substantially the same charge (same data). For example, the data cells may be pre-programmed so that the bits in the cells are set to “0”. The pre-program voltage may be applied substantially at the same time to all the cells in the sector, or in smaller subdivisions, for example, by page (cells connected to a same word line), or groups of cells within a page. Following pre-programming, in erase step 104 an erase voltage is applied to the pre-programed cells in the sector to erase the pre-programmed data. Erasing may be done to the cells substantially at the same time, for example, by applying the erase voltage to all the word lines in the same sector, or to a select group of word lines including the pre-programmed cells. As a result of the erasing, the bits in the erased data cells may be set to “1”. In soft-program step 106, cells which may have been over-erased in the previous step are soft-programmed to increase the threshold voltage needed to indicate an erased state. Following the soft programming, all bits in the data cells remain set to “1”. In non-data cell program step 108, non-data cells which may serve as reference cells may be programmed to a certain threshold voltage. The non-data cells may include dynamic reference cells to account for drift in the threshold voltages of the data cells. Following this step, all data bits in the erased sector remain set to “1”. In erase completed step 110, the erasure operation is completed and the sector is ready for individual programming of the cells by a user of the non-volatile memory device.